Multiple etch methods for forming contact holes in microelectronic devices including SOG layers and capping layers thereon
US6117785A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 1997 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Jul 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a microelectronic device includes the steps of forming a spin-on-glass layer on a microelectronic substrate, and forming a capping layer on the spin-on-glass layer opposite the substrate. A masking layer is formed on the capping layer opposite the substrate wherein the masking layer exposes portions of the capping layer and the spin-on-glass layer. The exposed portions of said capping layer and the spin-on-glass layer are etched using the masking layer as an etch mask to thereby form a contact hole through the capping layer and the spin-on-glass layer wherein protruding edge portions of the capping layer extend beyond the spin-on-glass layer adjacent the contact hole. The mask layer is removed, and the protruding edge portions of the capping layer are removed from adjacent the contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.