Self biased differential amplifier with hysteresis
US6118318A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 1997 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | May 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3525
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A self biased differential amplifier has a switching point accurately set according to a reference voltage. DC hysteresis is provided, by a circuit internal to the differential amplifier. The amplifier has an input circuit having first and second series connected transistors, wherein the beta ratio of these first and second transistors is changed by enabling an additional transistor of a hysteresis circuit according to an output state of the differential amplifier. When the output state is "high", the switching point is decreased in order that temporary small drops (due to noise or glitches) in the input signal are ignored. Conversely, when the output state is "low", the switching point is increased in order that temporary small increases in the input signal are ignored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.