Electrostatic discharge protection circuit and method
US6118323A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a voltage supply internal to the integrated circuit and circuitry for sensing the voltage level of the internal voltage supply, the circuitry responsive to produce a flag signal, VPUEN, that is in a first logical state when the voltage level is below the desired level and in a second logical state when the voltage level is above the desired level. The integrated circuit also includes a buffer driver 406 having an input terminal and an output terminal, the input terminal being coupled to the circuitry for sensing the voltage level of the internal voltage supply. The operation of the circuit is such that the output terminal 400 of the buffer driver is in a high-impedance state when the flag signal is in the first logical state, and is responsive to data signals on the input terminal to produce corresponding output signals at the output terminal when the flag signal is in the second logical state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.