Patent · US Expired

Priority allocation in a bus interconnected discrete and/or integrated digital multi-module system

US6119188A · kind A · utility

14Cited by
9References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 27, 1998
Grant dateSep 12, 2000
Priority date
Expiry dateApr 27, 2018

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4068
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and associated arrangement for use in priority allocation in a bus interconnected digital multi-module system are disclosed. The modules are configured for requesting the use of the bus with each module being granted its request based upon its priority. During the operation of the system, a set of priorities is established such that the number of priorities is equal to the number of modules in the system. Each module is assigned to an initial priority. During the operation of the system, modules may be reassigned to a priorities which are different than their initial priorities. In addition, the priorities may be grouped in an initial group arrangement which may be reconfigured. The group arrangement may be reconfigured in any desired manner. Also, provisions are made for refusing a grant to a module even though that module possesses the highest priority among requesting modules.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.