Patent · US Expired

Hardwire logic device emulating an FPGA

US6120551A · kind A · utility

75Cited by
15References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 29, 1997
Grant dateSep 19, 2000
Priority date
Expiry dateSep 29, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/30
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A hybrid HardWire device is provided that comprises a gate array core and a set of mask programmable I/O cells having I/O characteristics similar to those of an FPGA, i.e., sufficiently the same so the HardWire device can be used as a drop-in replacement for the FPGA with no redesign of the original system. Using this HardWire device, a user's design originally implemented in an FPGA can be emulated in the HardWire device, which then replaces the FPGA in the same board at a lower cost. In another embodiment, the I/O cells are mask programmable such that they can emulate the I/O characteristics of FPGAs from any of two or more FPGA families. This ability reduces the number of separate HardWire devices that must be designed, manufactured, tested, stored, and sold, and also simplifies the software required to convert designs to the new device. Some embodiments of the invention can also emulate other programmable devices such as PLDs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.