Process for fabricating bipolar and BiCMOS devices
US6121101A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 1998 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Mar 12, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0109
Abstract
A process for device fabrication in which amorphous silicon is deposited into a narrow gap is disclosed. The gap is an opening between two layers of material. The gap results when a window is formed in one of the two layers and a portion of a third layer at the base of the window is removed. In the formation of a bipolar device, a layer of oxide is formed on a silicon substrate and a layer of silicon is formed on the oxide layer which serves as the extrinsic base for the device. In the bipolar device, a window is formed in the polysilicon and the oxide layer at the base of the window is then removed. In the bipolar device, the silicon substrate underlies the gap and the extrinsic base silicon overlies the gap. When the oxide is removed from the base of the window, a portion of the oxide layer underlying the extrinsic base silicon is removed as well, thereby forming a gap between the extrinsic base silicon and the underlying silicon substrate. In the process of the present invention, the resulting gap has a proximate end which is the opening of the gap into a window and a distal end which is the interface between the gap and the remaining oxide. The width of the gap is less than abo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.