Buried patterned conductor planes for semiconductor-on-insulator integrated circuit
US6121659A · kind A · utility
83Cited by
14References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1998 |
| Grant date | Sep 19, 2000 |
| Priority date | — |
| Expiry date | Mar 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor-on-insulator integrated circuit with buried patterned layers as electrical conductors for discrete device functions, thermal conductors, and/or decoupling capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.