Lateral field effect transistor of SiC, a method for production thereof and a use of such a transistor
US6127695A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 1999 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Feb 8, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/931
Abstract
A lateral field effect transistor of SiC for high switching frequencies comprises a source region layer (5) and a drain region layer (6) laterally spaced and highly doped n-type, an n-type channel layer (4) extending laterally and interconnecting the source region layer and the drain region layer for conducting a current between these layers in the on-state of the transistor, and a gate electrode (9) arranged to control the channel layer to be conducting or blocking through varying the potential applied to the gate electrode. A highly doped p-type base layer (12) is arranged next to the channel layer at least partially overlapping the gate electrode and being at a lateral distance to the drain region layer. The base layer is shorted to the source region layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.