MRAM device including analog sense amplifiers
US6128239A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Oct 3, 2000 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Resistance of a selected memory cell in a Magnetic Random Access Memory ("MRAM") device is sensed by a read circuit including a direct injection charge amplifier, an integrator capacitor and an analog sense amplifier. The direct injection charge amplifier supplies current to the integrator capacitor while maintaining an equipotential voltage on non-selected memory cells in the MRAM device. As the direct injection charge amplifier applies a fixed voltage to the selected memory cell, the sense amplifier generates an input signal having a transition that is time-delayed according to the voltage on the integrator capacitor; generates a reference signal having a time-fixed transition; and compares a relative occurrence of transitions in the input and reference signals. The relative occurrence indicates whether a logic value of `0` or `1` is stored in the selected memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.