Moisture and ion barrier for protection of devices and interconnect structures
US6130472A · kind A · utility
16Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1998 |
| Grant date | Oct 10, 2000 |
| Priority date | — |
| Expiry date | Jul 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides polymeric materials that can be used as a moisture/ion barrier layer for inhibiting the penetration of moisture and/or ions for coming into contact with the metal wiring found in chip level interconnects. The present invention also provides a means to protect the chip backside from being contaminated by metal atoms or metal ions which are capable of forming mobile silicides, which can migrate to the active sites of the semiconductor and destroy them. The present invention further provides methods of forming such polymeric barrier layers on at least one surface of an interconnect structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.