Integrated manufacturing packaging process
US6131279A · kind A · utility
8Cited by
12References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1998 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Jan 8, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process of fabricating a circuitized substrate is provided which comprising the steps of: providing an organic substrate having circuitry thereon; applying a dielectric film on the organic substrate; forming microvias in said dielectric film; sputtering a metal seed layer on the dielectric film and in said microvias; plating a metallic layer on the metal seed layer; and forming a circuit pattern thereon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.