Method of fabricating double poly-gate high density multi-state flat mask ROM cells

US6133102A · kind A · utility

Inventor

• Shye-Lin Wu · 東區, TW

Key dates

• Filing date: Jun 19, 1998
• Grant date: Oct 17, 2000
• Expiry date: Jun 19, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B20/00

Abstract

A method to fabricate double poly gate high-density multi-state flat mask ROM cells on a silcon substrate is disclosed. The method comprises the following steps. Firstly, an in-situ n+ first polysilicon/pad oxide layer is deposited on the silicon substrate, and then an ARC layer such as nitride layer is deposited to improve the resolution during the lithography process for pateterning a first formed word line. After forming a plurality of dual nitride spacers on sidewalls of the first patterned gate, a first photoresist coating on all resultant surfaces except the two predetermined regins, a first boron or BF.sub.2.sup.+ coding implant into the silicon substrate is carried out. The photoresist is then stripped and an oxidaiton process conducted in O.sub.2 ambient to grow oxide layers on all surfaces of the silicon substrate using the nitride layer as a hard mask. Subsequently, a second silicon layer (polysilicon or amorphous silicon) is deposited to refill all of the spaces between the two nearest first formed gates, and then a thick oxide layer is formed on the second polysilicon layer. After that, a CMP process is done to form a flat surface using the nitride as an etching stoppe…