Lower metal feature profile with overhanging ARC layer to improve robustness of borderless vias
US6133142A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1997 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Dec 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Reliable vias are formed by providing an adequate landing area without increasing the size of the underlying feature. Embodiments include forming a lower metal feature with an ARC layer extending beyond the side surfaces of the primary conductive portion serving as an etch stop when forming the through-hole. The overhanging portion provides a suitable landing pad without increasing the size of the underlying feature. Embodiments include ARCs having a thickness ranging from about 1000 .ANG. to about 1300 .ANG. and an overhanging portion extending beyond the side surface of the primary conductive portion up to about 0.05 microns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.