Combination of global clock and localized clocks
US6133750A · kind A · utility
6Cited by
5References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1998 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Apr 27, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device includes a global clock structure and a plurality of localized clock structures. Each localized clock structure distributes a respective localized clock signal to a corresponding portion of the programmable logic device. The global clock structure distributes a global clock signal to all portions of the programmable logic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.