System and method for representing a system level RTL design using HDL independent objects and translation to synthesizable RTL code
US6135647A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1997 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Oct 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for representing a system level RTL hardware design using an HDL independent RTL representation and translation into synthesizable RTL code. The present invention creates an object-oriented library which can be used to implement RTL hardware designs in terms of HDL independent objects. Instead of implementing multiple HDL instances of hardware modules, the invention enables software tool programmers to implement one HDL-independent instance of the hardware module. As a result, a programmer can focus his efforts on generating the functionality of the module and can be relieved from the time consuming task of generating the detailed syntax of multiple HDLs. The present invention also maintains synchronization across multiple HDLs so that a software designer can generate HDL code for any supported HDL, e.g., Verilog or VHDL, thus making software maintenance easier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.