Filling of high aspect ratio trench isolation
US6136664A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 1997 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Aug 7, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a trench isolation on a semiconductor substrate comprising the steps of forming a trench in the substrate, partially filling the trench with a first layer of polysilicon, oxidizing the first layer of polysilicon, partially filling the trench with at least a second layer of polysilicon, and oxidizing the second layer of polysilicon. By utilizing the method of the present invention, formation of voids and defects in a trench isolation having a high aspect ratio can be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.