Technique for extending the limits of photolithography
US6140217A · kind A · utility
62Cited by
15References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Jul 16, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a wiring pattern in a device comprises forming an array of grooves in a mask, forming first spacers adjacent vertical walls of the grooves, removing the mask, forming second spacers adjacent the first spacers, and filling areas between the first spacers and areas between the second spacers with a material to form the wiring pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.