Method for eliminating CMP induced microscratches
US6140240A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1999 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Jan 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31138
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of removing microscratches in planarized dielectric surfaces covering conductor layers in submicron integrated circuit structures includes a semiconductor substrate having at least one dielectric layer formed thereon followed by a chemical mechanical polishing process for planarization. The removal of microscratches includes depositing a PE-CVD polymer layer to fill the microscratches, caused by CMP planarization, and to cover the planarized dielectric surface with a thin layer of the polymer. Deposition is followed by introducing an etching gas into the CVD chamber for an etch back of the just deposited polymer to well below the depth of the microscratches wherein the deposited polymer has the same etch rate as the dielectric layer formed thereunder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.