Tzu-Shih Yen
24Patents
11h-index
22Co-inventors
71Inventor score
Filing activity: Aug 26, 1996 → Mar 3, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5688713A | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers | Emerging Cross-Sectional Technologies | 152 | Expired |
| US5895740A | Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers | Electricity | 100 | Expired |
| US5780338A | Method for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuits | Electricity | 72 | Expired |
| US6037216A | Method for simultaneously fabricating capacitor structures, for giga-bit DRAM cells, and peripheral interconnect structures, using a dual damascene process | Electricity | 65 | Expired |
| US5904154A | Method for removing fluorinated photoresist layers from semiconductor substrates | Electricity | 62 | Expired |
| US8685825B2 | Replacement source/drain finFET fabrication | Electricity | 24 | Active |
| US5962195A | Method for controlling linewidth by etching bottom anti-reflective coating | Electricity | 23 | Expired |
| US6124192A | Method for fabricating ultra-small interconnections using simplified patterns and sidewall contact plugs | Electricity | 22 | Expired |
| US6235621A | Method for forming a semiconductor device | Electricity | 17 | Expired |
| US6265296A | Method for forming self-aligned contacts using a hard mask | Electricity | 14 | Expired |
| US6376384B1 | Multiple etch contact etching method incorporating post contact etch etching | Emerging Cross-Sectional Technologies | 12 | Expired |
| US6306759A | Method for forming self-aligned contact with liner | Electricity | 10 | Expired |
| US6140240A | Method for eliminating CMP induced microscratches | Electricity | 9 | Expired |
| US9209278B2 | Replacement source/drain finFET fabrication | Electricity | 8 | Active |
| US6278189A | High density integrated circuits using tapered and self-aligned contacts | Electricity | 7 | Expired |
| US5994228A | Method of fabricating contact holes in high density integrated circuits using taper contact and self-aligned etching processes | Electricity | 6 | Expired |
| US8871584B2 | Replacement source/drain finFET fabrication | Electricity | 6 | Active |
| US6136661A | Method to fabricate capacitor structures with very narrow features using silyated photoresist | Electricity | 6 | Expired |
| US5899747A | Method for forming a tapered spacer | Electricity | 5 | Expired |
| US7457154B2 | High density memory array system | Electricity | 4 | Active |
| US9159810B2 | Doping a non-planar semiconductor device | Electricity | 4 | Active |
| US9006065B2 | Plasma doping a non-planar semiconductor device | Electricity | 2 | Active |
| US5990018A | Oxide etching process using nitrogen plasma | Electricity | 2 | Expired |
| US6423646B1 | Method for removing etch-induced polymer film and damaged silicon layer from a silicon surface | Chemistry; Metallurgy | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.