Technique for reducing element disable fuse pitch requirements in an integrated circuit device incorporating replaceable circuit elements
US6141281A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1998 |
| Grant date | Oct 31, 2000 |
| Priority date | — |
| Expiry date | Apr 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for reducing element disable fuse pitch requirements in an integrated circuit device incorporating replaceable elements wherein each group of replaceable elements contains a circuit which enables an element group within a chained set to determine whether it is the "leftmost" (or first) element used within the set by monitoring the state of an adjacent node. The node will transition to a logic "low" level if (and only if) a fuse within the set, (and located to the left of the node) is "blown" (or opened). By then multiplexing signals to select one or more elements within the first group and additional signals to select one or more elements within the second group, the necessary determination can be made to disable any given pair of elements based on the state of the fuses, the adjacent nodes and the additional signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.