Patent · US Expired

Semiconductor memory having differential bit lines

US6144590A · kind A · utility

4Cited by

8References

9Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Michael Markert · Augsburg, DE
Musa Saglam · Munich, DE
Sabine Schoniger · Hersbruck, DE
Peter Schrogmeier · Hersbruck, DE
Stefan Dietrich · Potsdam, DE
Thomas Hein · Hersbruck, DE
Thilo Marx · Villingen-Schwenningen, DE

Key dates

Filing date	May 20, 1999
Grant date	Nov 7, 2000
Priority date	—
Expiry date	May 20, 2019

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/4097
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a semiconductor memory, bit lines are disposed in such a way that in each case two inverted and two non-inverted bit lines lie next to one another. Adjacent switching transistors for connecting the bit lines to an inverted or a non-inverted collective line are connected to the corresponding collective line by a common contact. An advantage in terms of area is afforded by the fact that the two switching transistors have a common doping region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.