Method for fabricating metal-oxide-semiconductor field effect transistor device
US6146932A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1999 |
| Grant date | Nov 14, 2000 |
| Priority date | — |
| Expiry date | Sep 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a metal-oxide-semiconductor field effect transistor (MOSFET) device, includes: a step of dividing a semiconductor substrate into an active region and an isolation region; a step of forming a first insulation layer on the semiconductor substrate; a step of forming a first polycrystal silicon layer on the first insulation layer; a step of forming a first silicide layer on the first polycrystal silicon layer; a step of forming a second insulation layer on the first silicide layer; a step of patterning the second insulation layer; a step of forming a sidewall spacer at the side portions of the second insulation layer pattern; a step of forming a gate by sequentially etching the first silicide layer, the first polycrystal silicon layer and the first insulation layer by using the second insulation layer pattern and the sidewall spacer as a mask; a step for removing the sidewall spacer; a step of forming an oxide film at the side portions of the gate and at the upper portion of the semiconductor substrate; and a step of sequentially performing a process for forming an impurity region operated as a source/drain at the upper portion of the semiconductor substrate wh…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.