Method for manufacturing a thin oxide for use in semiconductor integrated circuits

US6146948A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Wei E. Wu · Austin, US
• Hsing-Huang Tseng · Austin, US
• Phillip E. Crabtree · Austin, US
• Yeong-Jyh T. Lii · Austin, US

Key dates

• Filing date: Jun 3, 1997
• Grant date: Nov 14, 2000
• Expiry date: Jun 3, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0144

Abstract

A method for forming a gate dielectric having different thickness begins by providing a substrate (12). A sacrificial oxide (14) is formed overlying the substrate (12). A first portion (11) of the sacrificial oxide (14) is exposed to a carbon-containing plasma environment (20). This carbon-containing plasma environment (20) forms a carbon-containing layer (24) within the region (11). After forming this region (24), a wet etch chemistry (22) is used to remove remaining portions of the sacrificial oxide (14) without forming a layer (24) in the region (13). Furnace oxidation is then used to form regions (26a) and (26b) wherein the growth of region (26a) has been retarded by the presence of the region (24). Therefore, the regions (26a) and (26b) are differing in thickness and can be used to make different transistors having different current gains.