Overlay measurement technique using moire patterns
US6150231A · kind A · utility
80Cited by
3References
5Claims
0Family size
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Key dates
| Filing date | Jun 15, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Jun 15, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70633
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Misalignment between two masking steps used in the manufacture of semiconductive devices in a wafer is determined by having a special alignment pattern on each of two masks used in the process and forming images of the masks on the semiconductor devices with the images of the alignment patterns being superimposed over one another to form a Moire pattern. The Moire pattern is compared with other Moire patterns known to correspond to particular amounts of misalignment of the masks to see if it corresponds to an acceptable alignment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.