Method for producing a transistor with self-aligned contacts and field insulation
US6150241A · kind A · utility
7Cited by
12References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Dec 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6729
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for making a MOS transistor. The transistor includes a source, a channel and drain formed on a portion of silicon film in a silicon-on-insulator type structure. A field insulation layer surrounds the film. A grid structure with insulated flanks is formed above the channel. Source and drain contacts are formed on the portion of the silicon film between the field insulation layer and the grid structure. The source and drain contacts are self-aligned on the grid structure and the field insulation layer is placed directly adjacent to the grid structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.