Enhanced macrocell module for high density CPLD architectures
US6150841A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1999 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Jun 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved CPLD includes a plurality of macrocell modules (MM's) where each MM can receive a relatively large number of independent inputs (at least 80) and can generate at least 5 different product term signals (PT's) therefrom. All 5 PT's may be used for generating a local sum-of-products (SoP). Any of the 5 PT's may be stolen (steered-away) to instead provide a local control for its macrocell module. Each module includes a local SoS-producing gate that can produce a sums-of-sums signal (SoS) that represents a Boolean sum of one or more of the local SoP signal, of SoP signals of neighboring macrocell modules, and of SoS signals of neighboring macrocell modules. Simple allocation and super-allocation may be used to produce sums-of-sums signals of relatively large, one-pass function depth, such as 160PT's in one pass.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.