Time delay circuit which is voltage independent
US6150864A · kind A · utility
5Cited by
3References
12Claims
0Family size
Inventors
Key dates
| Filing date | Aug 24, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Aug 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A time delay circuit that produces a constant delay and is independent of supply voltage. The time delay circuit has a current mirror circuit, a voltage shift circuit, an inverter and a capacitor. The inverter will trip at a predetermined voltage level. A capacitor is coupled to the current mirror circuit and to the inverter for generating a portion of the delay time. A voltage shift circuit is coupled to the inverter for approximately mirroring a voltage shift in the current mirror circuit thereby allowing the time delay circuit to be voltage independent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.