Patent · US Expired

Transistor with increased operating voltage and method of fabrication

US6153451A · kind A · utility

8Cited by
6References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 5, 1998
Grant dateNov 28, 2000
Priority date
Expiry dateJan 5, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/62

Abstract

A method for increasing the operating voltage of a transistor formed on a substrate of a first conductivity region of a second conductivity type in a surface of the substrate. An N-well adjust region of the first conductivity type is then formed in the N-well region. The N-well adjust region extends to a first depth in the N-well region. A double diffusion well of the first conductivity type is then formed in the N-well. The double diffusion well extends to a second depth greater than the first depth of the N-well adjust region, and contains a portion of the N-well. Two N- channel stop regions are then formed in the N-well. The two N-channel stop regions extending to a third depth greater than the depth of the N-well adjust region, and contain a portion of the N-well.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.