Flip-chip connecting method, flip-chip connected structure and electronic device using the same
US6153938A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1998 |
| Grant date | Nov 28, 2000 |
| Priority date | — |
| Expiry date | Jul 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stable low-connecting resistance connection arrangement having a high yield rate without using any special material or process for a substrate. A flip-chip connecting structure in which the semiconductor integrated circuit (IC) chip is mounted directly on an organic circuit substrate. To achieve reliable connection and low-connecting resistance, the present invention absorbs variation of the heights of projecting electrodes formed on a semiconductor IC chip and substrate electrodes of an organic circuit substrate for example, by deforming the substrate electrodes and/or substrate layer of the organic circuit substrate. Resin of a conductive paste disposed between the projecting electrodes and substrate electrodes is squeezed out leaving a high density conductive particle layer to lower a contact resistance between such electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.