Circuit driver on SOI for merged logic and memory circuits
US6157216A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1999 |
| Grant date | Dec 5, 2000 |
| Priority date | — |
| Expiry date | Apr 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01707
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A silicon-on-insulator digital circuit combination having a body voltage control stage and a voltage clamp stage. The body voltage control stage is responsive to an input control signal to provide an output driver signal. The body voltage control stage has a first transistor with a terminal for electrically-coupling to a combinational logic circuit, and a body contact electrically-coupled to the input control signal such that a threshold voltage of the transistor is reduced when the transistor is placed in an active state. It can be readily appreciated that the reduced threshold voltage of the transistor increases the transition rate for the first transistor to an inactive state in response to the input control signal. The voltage clamp stage has a second transistor responsive to the input control signal such that the terminal is electrically-coupled to a reference voltage when the first transistor is in the inactive state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.