Delay stabilization system for an integrated circuit
US6157231A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1999 |
| Grant date | Dec 5, 2000 |
| Priority date | — |
| Expiry date | Mar 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00097
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system for stabilizing a delay through a signal path of an integrated circuit (IC) includes an oscillator for producing a periodic first reference signal, a delay circuit for delaying the first reference signal to produce a periodic second reference signal, and a loop controller for adjusting the magnitude of the IC's power supply so as to maintain a constant phase difference between the first and second reference signals. By adjusting the power supply magnitude, the loop controller also stabilizes signal path delays through logic circuits implemented in the IC. The oscillator is formed by a logic gate implemented in the IC and a passive delay line feeding the logic gate's output back to its input. The delay of the delay circuit is programmably adjustable to allow for adjustment of the signal path delay through the IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.