Method of making a semiconductor device with an etching stopper
US6162676A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 1998 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Aug 31, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate, a first etching stopper insulating film, a first insulating interlayer, a pair of first contact holes, first buried conductive layers, a first interconnection formed on one of the first buried conductive layers, a second insulating interlayer, a second contact hole, a second buried conductive layer, and a second interconnection. The first contact holes are formed at a predetermined interval in a direction parallel to the surface of the semiconductor substrate so as to reach a semiconductor element formed on the semiconductor substrate through the first insulating interlayer and the etching stopper insulating film. The second contact hole is formed to reach the other first buried conductive layer through the second insulating interlayer corresponding to a portion above the first buried conductive layer. Each of the first contact holes is constituted by a small-diameter lower contact hole formed in the first etching stopper insulating film and a large-diameter upper contact hole formed in the first insulating interlayer, and the first bu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.