Method and apparatus for transferring data over a processor interface bus
US6163835A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1998 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Jul 6, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of transferring data between a slave device (20) in communication with a processor interface bus (34) where the processor interface bus is in communication with a master device (12) including receiving an address from the processor interface bus (34) where the address was provided by the master device (block 302). A first signal is asserted (blocks 318 and 324) on the processor interface bus (34) to indicate that the slave device (20) is servicing a data transfer transaction. A second signal is asserted (block 320) on the processor interface bus (34) to indicate whether data to be transferred using the processor interface bus (34) is to be stored in main memory (36) by a main memory controller (32) in communication with the processor interface bus (34). The data is transferred (block 326) between the slave device (20) and the processor interface bus (34).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.