Wafer carrier adapter and method for use thereof
US6165268A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1998 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Dec 16, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer carrier adapter for use with a 200 millimeter wafer carrier and a pod door opener to a front end of a semiconductor processing environment. The 200 millimeter wafer carrier has a bottom surface and is provided with a plurality of recesses extending through the bottom surface in a predetermined configuration and a front opening for accessing silicon wafers in the wafer carrier. The pod door opener has a platform with a kinematic coupling which includes a plurality of pins extending upwardly in a predetermined pattern from the platform for aligning and supporting 300 millimeter wafer carriers relative to a port in the pod door opener. The wafer carrier adapter comprises a support structure having top and bottom surfaces. The support structure is provided with a plurality of recesses extending through the bottom surface adapted to receive the plurality of pins. The plurality of recesses of the support structure correspond in number to the plurality of pins and are arranged in a pattern corresponding to the predetermined pattern of pins for precisely aligning the support structure relative to the plurality of pins. The top surface has a plurality of protuberances adapted for di…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.