Tapered electrode for stacked capacitors
US6165864A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 1998 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Jul 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/711
Abstract
A method for forming a stacked capacitor includes the steps of providing a first insulating layer having a conductive access path therethrough, forming a second insulating layer on the first insulating layer, forming a trench in the second insulating layer, the trench having tapered sidewalls, forming a first electrode in the trench and on the trench sidewalls, the first electrode being electrically coupled to the conductive access path, forming a dielectric layer on the first electrode and forming a second electrode on the dielectric layer. A stacked capacitor having increased surface area includes a first electrode formed in a trench provided in a dielectric material. The first electrode has tapered surfaces forming a conically shaped portion of the first electrode, the first electrode for accessing a capacitively coupled storage node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.