Model based method for wafer temperature control in a thermal processing system for semiconductor manufacturing
US6169271A · kind A · utility
9Cited by
29References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 1999 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Jul 12, 2019 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC30B25/16
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for controlling wafer temperature in a thermal reactor. A wafer is positioned between two or more surfaces, one or more of which are heated. A control temperature is calculated based on the temperatures of the surfaces. The heat applied to the surface(s) is adjusted in response to the control temperature in order to maintain the wafer temperature within narrowly defined limits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.