Efficient routing from multiple sources to embedded DRAM and other large circuit blocks
US6169418A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 24, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Jun 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1778
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved routing system and method allow routing of pluralities of signals to circuit blocks on integrated circuit chips using minimal die area. The improved routing system employs a plurality of tri-state buffers, a plurality of conductive lines, and a controller. The circuit block can be driven from remote locations via the tri-state buffers and conductive lines. The tri-state buffers are selectively enabled one at a time by the controller to prevent signal contention. The multiplexors encountered in conventional routing systems are not needed. The improved routing system and method are ideal for routing to and from large circuit blocks which have numerous terminals, such as embedded dynamic random access memory units, embedded static random access memory units, central processing units, arithmetic logic units, register files, and cores generally. The improved routing system and method also allow testing of large circuit blocks with test vectors supplied by built in self test units and or off-chip test equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.