Fault simulation using dynamically alterable behavioral models
US6170078A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Feb 27, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318342
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for the fault simulation testing of circuits by using a behavioral model is provided. The behavioral model includes a fault bus, decoder, and input and output ports. The decoder decodes mapping fault values, which are applied to the fault bus, to either a no-fault or to a specific fault which is internally encoded into the behavioral model. Accordingly, a single behavioral model can be used to dynamically model a fault-free circuit or machine and one or more faulty circuits or machines based on the mapping fault data applied to each model's fault bus. A fault simulation tool applies test simulation data having mapping fault and test parameter data to at least two identically coded behavioral models (i.e., a fault-free model and a faulty model, as defined by the applied mapping fault data). Output data are generated by each behavioral model and recorded by the fault simulation tool. A comparison of the output data of the fault-free behavioral model and the at least one faulty behavioral model is performed to determine whether the test pattern data detected differences therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.