Matthew C. Graf
7Patents
7h-index
12Co-inventors
56Inventor score
Filing activity: Jul 16, 1981 → Feb 27, 1998
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4656580A | Logic simulation machine | Physics | 113 | Expired |
| US4503386A | Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks | Electricity | 65 | Expired |
| US4517661A | Programmable chip tester having plural pin unit buffers which each store sufficient test data for independent operations by each pin unit | Physics | 52 | Expired |
| US4509008A | Method of concurrently testing each of a plurality of interconnected integrated circuit chips | Physics | 39 | Expired |
| US6170078A | Fault simulation using dynamically alterable behavioral models | Physics | 22 | Expired |
| US5796990A | Hierarchical fault modeling system and method | Physics | 15 | Expired |
| US4613958A | Gate array chip | Electricity | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.