Method for fabricating tunnel window in EEPROM cell with reduced cell pitch
US6171907A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 1997 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Dec 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A method for fabricating a tunnel window in an EEPROM cell that reduces or eliminates the initial active region overlap yet still compensates for tunnel window misalignment. The inventive method accomplishes this by removing a portion of the field oxide layer surrounding an initial active region before depositing the BN+ diffusion layer. This step is performed in order to enlarge the area in which the BN+ diffusion layer is formed to beyond the perimeter of the tunnel window forming a final active region. As a result, the method of the present invention ensures that the tunnel window is fully enclosed by the BN+ diffusion layer despite any tunnel window misalignment that may occur. Reducing the initial active region creates an EEPROM cell with a reduced cell pitch while increasing its coupling ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.