Non-volatile semiconductor memory device with an improved verify voltage generator
US6172911A · kind A · utility
33Cited by
43References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1999 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Apr 1, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.