Integrated circuit having aligned fuses and methods for forming and programming the fuses
US6172929A · kind A · utility
10Cited by
3References
47Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 1999 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Jun 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a first conductive layer, an insulator layer disposed on the first conductive layer, and a second conductive layer disposed on the insulator layer. A first fuse is disposed in the first conductive layer and provides a first signal, and a second fuse is disposed in the second conductive layer in alignment with the first fuse and provides a second signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.