Fuse cell for on-chip trimming
US6175261A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1999 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Jan 7, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An on-chip fuse circuit. The circuit includes a fuse capable of being blown during a programming operation, as well as output logic for determining whether the fuse is blown. A protection circuit is provided for protecting the output logic during programming. An evaluation circuit is provided, for evaluating whether the fuse is blown. The evaluation circuit includes a first current source coupled to the fuse, providing a first predetermined current so as to activate the output logic to read out the condition of the fuse during normal operation, as well as a second current source coupled to the fuse, providing a second predetermined current, substantially less than the first predetermined current, so as to activate the output logic to read out the condition of the fuse during an evaluation mode such that a blown condition is indicated by the output logic only if the resistance of the fuse is substantially greater than that required for the output logic to indicate a blown condition during normal operation. According to another aspect of the invention there is provided an on-chip fuse circuit including a first fuse and a second fuse, both being capable of being blown during a program…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.