Data processing unit with debug capabilities using a memory protection unit
US6175913A · kind A · utility
17Cited by
10References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 12, 1997 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Sep 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing unit is described which comprises a central processing unit, a bus coupled with the central processing unit to access a device via address and data lines coupled with the bus. A debug unit is coupled to the bus, a protection unit is coupled with the bus and with the debug unit for protecting access on the bus. The protection unit is programmable to operate in a protecting mode in which the bus can be protected and in a debug mode in which a signal is sent to the debug unit, whereupon the debug unit generates a debug signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.