Patent · US Expired

Integrated circuit testing device with dual purpose analog and digital channels

US6175939A · kind A · utility

18Cited by
3References
21Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 30, 1999
Grant dateJan 16, 2001
Priority date
Expiry dateMar 30, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/31924
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integrated circuit (IC) tester includes a set of dual-purpose digital/analog channels. Each tester channel includes a driver capable of supplying either a digital or analog test signal input to an IC terminal and a receiver for digitizing and processing either an analog or digital IC output signal appearing at the DUT terminal to produce results data representing the behavior of that IC output signal during a test. A test is organized into a succession of test cycles, and before each test cycle a pattern generator within each channel produces data for controlling the behavior of the driver and receiver during the test cycle. The control data controls whether the driver is to produce an analog or a digital test signal, controls a magnitude or logic level to which the test signal is to be driven during the test cycle, and controls a time during the test cycle of any test signal state or magnitude changes. The control data also indicates how and when the receiver digitizes and processes an IC output signal during the test cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.