Methods to reduce light leakage in LCD-on-silicon devices
US6180430A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1999 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Dec 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5225
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating an LCD-on-silicon device, comprising the following steps. A semiconductor structure having a control transistor formed therein is provided. The control transistor having a source and a drain. An interlevel dielectric (ILD) layer over the semiconductor structure is provided. Source/drain (S/D) plugs contacting the source and drain through contact openings in said ILD layer are provided. M1 lines are formed over the ILD layer and connected to at least the S/D plugs. An M1 intermetal dielectric (IMD) layer is deposited and patterned over the M1 lines to form M1 contact openings exposing at least some of the M1 metal lines. M1 metal plugs are formed within the M1 contact openings and M2 metal islands connected to, and integral with, at least the M1 metal plugs. The M2 metal islands having exposed side walls. Sidewall spacers are formed on the exposed M2 metal islands side walls. A second M2 metallization layer is deposited and patterned over the M2 metal islands to form a shielding layer adjacent to and contiguous with the sidewall spacers. The M2 metal islands, sidewall spacers, and shielding layer form a light shielding layer. At least one additional dielectri…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.