Patent assignee · SG · COMPANY

Chartered Semiconductor Manufacturing LTD

991Patents
131Active
991Granted
49Portfolio score

Filing activity: Apr 3, 1991 → Feb 7, 2011 · 129 expiring within 5 years

Most-cited patents

PatentTitleAreaCited byStatus
US6303418A Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layer Electricity 316 Expired
US5858876A Simultaneous deposit and etch method for forming a void-free and gap-filling insulator layer upon a patterned substrate layer Electricity 296 Expired
US6538333B2 Three dimensional IC package module Electricity 296 Expired
US6136693A Method for planarized interconnect vias using electroless plating and CMP Electricity 263 Expired
US6197705A Method of silicon oxide and silicon glass films deposition Electricity 260 Expired
US5989978A Shallow trench isolation of MOSFETS with reduced corner parasitic currents Electricity 223 Expired
US5693563A Etch stop for copper damascene process Electricity 214 Expired
US6348407B1 Method to improve adhesion of organic dielectrics in dual damascene interconnects Electricity 198 Expired
US6884712B2 Method of manufacturing semiconductor local interconnect and contact Electricity 197 Expired
US6261935A Method of forming contact to polysilicon gate for MOS devices Electricity 194 Expired
US6492726B1 Chip scale packaging with multi-layer flip chip arrangement and ball grid array interconnection Electricity 194 Expired
US5856225A Creation of a self-aligned, ion implanted channel region, after source and drain formation Electricity 186 Expired
US6300177A Method to form transistors with multiple threshold voltages (VT) using a combination of different work function gate materials Electricity 160 Expired
US5801083A Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners Emerging Cross-Sectional Technologies 152 Expired
US7169675B2 Material architecture for the fabrication of low temperature transistor Electricity 149 Expired
US6040243A Method to form copper damascene interconnects using a reverse barrier metal scheme to eliminate copper diffusion Electricity 148 Expired
US6376353B1 Aluminum and copper bimetallic bond pad scheme for copper damascene interconnects Electricity 141 Expired
US5595919A Method of making self-aligned halo process for reducing junction capacitance Electricity 129 Expired
US6706625B1 Copper recess formation using chemical process for fabricating barrier cap for lines and vias Electricity 123 Expired
US6743291B2 Method of fabricating a CMOS device with integrated super-steep retrograde twin wells using double selective epitaxial growth Chemistry; Metallurgy 122 Expired
US6297132A Process to control the lateral doping profile of an implanted channel region Electricity 118 Expired
US7759206B2 Methods of forming semiconductor devices using embedded L-shape spacers Electricity 116 Expired
US7867835B2 Integrated circuit system for suppressing short channel effects Electricity 115 Active
US5728621A Method for shallow trench isolation Electricity 112 Expired
US6436824B1 Low dielectric constant materials for copper damascene Electricity 111 Expired

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.