Patent · US Expired

Method and apparatus for testing dynamic logic using an improved reset pulse

US6181155A · kind A · utility

0Cited by
7References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 1999
Grant dateJan 30, 2001
Priority date
Expiry dateApr 28, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/31922
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method and apparatus for detecting whether dynamic logic circuits are precharging properly. The method and apparatus uses a narrowed reset pulse to verify precharging is occurring as designed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.