Semiconductor integrated circuit device
US6181174A · kind A · utility
72Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1999 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Sep 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device includes a DLL circuit. The DLL circuit includes a frequency divider which frequency-divides an input clock at a frequency dividing ratio which is varied depending on a frequency of the input clock and thus results in a dummy clock and a reference clock. A delay system includes a variable delay circuit which delays the dummy clock. A control circuit controls a delay amount of the variable delay circuit so that a phase of a delayed dummy clock from the delay system and the reference clock becomes zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.