Threshold voltage mismatch compensated sense amplifier for SRAM memory arrays
US6181621A · kind A · utility
26Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 10, 1999 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Dec 10, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit comprising a first and a second sense transistor, a bitline and a complementary bitline, one or more first switches and one or more second switches. The first switches may be configured to couple the first sense transistor to the bitline and the second sense transistor to the complementary bitline. The second switches may be configured to couple the first sense transistor to the complementary bitline and the second sense transistor to the bitline. The first and second switches may be configured to provide voltage threshold matching between the first and second transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.